Operations:

Format

Syntax:

Operation:

Operands:

Architecture revision

Opcode

1

packsh.ub Rd, Rx, Ry 

Rd[31:24] = SATSU(Rx[31:16], 8); Rd[23:16] = SATSU(Rx[15:0], 8);
Rd[15:8] = SATSU(Ry[31:16], 8); Rd[7:0] = SATSU(Ry[15:0], 8);
 
{d, x, y} ∈ {0, 1, …, 15}

Rev1+

111

Rx

00000

Ry

001001001100

Rd

3

4

5

4

12

4

2

packsh.sb Rd, Rx, Ry 

Rd[31:24] = SATS(Rx[31:16], 8); Rd[23:16] = SATS(Rx[15:0], 8);
Rd[15:8] = SATS(Ry[31:16], 8); Rd[7:0] = SATS(Ry[15:0], 8);
 
{d, x, y} ∈ {0, 1, …, 15}

Rev1+

111

Rx

00000

Ry

001001001101

Rd

3

4

5

4

12

4

Description

Pack the four signed halfwords located in the two source registers into four bytes in the destina- tion register. Each of the signed halfwords are saturated to unsigned (packsh.ub) or signed bytes (packsh.sb).

Status Flags:

Q:

Flag set if saturation occured in one or more of the partial operations.

V:

Not affected.

N:

Not affected.

Z:

Not affected.

C:

Not affected.